Author: Daesun Oh
Publisher: ProQuest, UMI Dissertation Publishing
Keywords: ldpc, decoders, architectures, vlsi, complexity, low
Number of Pages: 160
Published: 2011-09-03
List price: $69.00
ISBN-10: 1243533447
ISBN-13: 9781243533449

Low-density parity-check (LDPC) codes originally discovered by Gallager in 1962 and rediscovered by MacKay in 1995 have recently received tremendous attention because they can achieve performance close to near Shannon limit over the binary symmetric channel (BSC) as well as the additive white Gaussian noise (AWGN) channel. Recently, LDPC codes have been chosen to be part of several practical applications such as IEEE 802.11n WLAN and IEEE 802.16e WiMAX systems. This thesis considers several VLSI implementation issues for LDPC decoders and develops a novel low complexity LDPC decoder architectu